[Devel] [PATCH RHEL7 COMMIT] ms/KVM: LAPIC: Introduce limit_periodic_timer_frequency

Konstantin Khorenko khorenko at virtuozzo.com
Wed Jul 25 18:47:08 MSK 2018


The commit is pushed to "branch-rh7-3.10.0-862.9.1.vz7.63.x-ovz" and will appear at https://src.openvz.org/scm/ovz/vzkernel.git
after rh7-3.10.0-862.9.1.vz7.63.2
------>
commit 70f8f813fa529f38b8f7bd46cd6282a6ed9234a4
Author: Wanpeng Li <wanpeng.li at hotmail.com>
Date:   Wed Jul 25 18:47:08 2018 +0300

    ms/KVM: LAPIC: Introduce limit_periodic_timer_frequency
    
    Extract the logic of limit lapic periodic timer frequency to a new function,
    this function will be used by later patches.
    
    Cc: Paolo Bonzini <pbonzini at redhat.com>
    Cc: Radim Krčmář <rkrcmar at redhat.com>
    Signed-off-by: Wanpeng Li <wanpeng.li at hotmail.com>
    Signed-off-by: Radim Krčmář <rkrcmar at redhat.com>
    (cherry picked from commit ccbfa1d39b9e6d6e578176d091362287c53c7d4d)
    Signed-off-by: Viktor Prutyanov <viktor.prutyanov at virtuozzo.com>
    
    This patch differs from original because of different order of functions
    in arch/x86/kvm/lapic.c
    
    https://jira.sw.ru/browse/PSBM-86578
    
    Signed-off-by: Viktor Prutyanov <viktor.prutyanov at virtuozzo.com>
    
    =====================
    Patchset description:
    
    Fix guest context switch performance degradation.
    
    https://jira.sw.ru/browse/PSBM-86578
    
    Following patches were adopted from mainline kernel to fix guest Windows
    context switch performance degradation.
    
    VMX preemption timer support was added in kernel-3.10.0-862.3.2.el7. In this
    case, timer incorrectly triggers despite of its disabling and causes extra
    VMexit on every context switch. These patches add correct handling of disabled
    timer.
    
    Radim Krčmář (3):
      KVM: x86: handle 0 write to TSC_DEADLINE MSR
      KVM: x86: really disarm lapic timer when clearing TMICT
      KVM: x86: thoroughly disarm LAPIC timer around TSC deadline switch
    
    Wanpeng Li (3):
      KVM: LAPIC: Fix lapic timer mode transition
      KVM: LAPIC: Introduce limit_periodic_timer_frequency
      KVM: LAPIC: Keep timer running when switching between one-shot and
        periodic mode
---
 arch/x86/kvm/lapic.c | 39 ++++++++++++++++++++++-----------------
 1 file changed, 22 insertions(+), 17 deletions(-)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index db52738b82a7..04c6fd357d6f 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1349,6 +1349,27 @@ void wait_lapic_expire(struct kvm_vcpu *vcpu)
 			nsec_to_cycles(vcpu, lapic_timer_advance_ns)));
 }
 
+static void limit_periodic_timer_frequency(struct kvm_lapic *apic)
+{
+	/*
+	 * Do not allow the guest to program periodic timers with small
+	 * interval, since the hrtimers are not throttled by the host
+	 * scheduler.
+	 */
+	if (apic_lvtt_period(apic)) {
+		s64 min_period = min_timer_period_us * 1000LL;
+
+		if (apic->lapic_timer.period < min_period) {
+			pr_info_ratelimited(
+			    "kvm: vcpu %i: requested %lld ns "
+			    "lapic timer period limited to %lld ns\n",
+			    apic->vcpu->vcpu_id,
+			    apic->lapic_timer.period, min_period);
+			apic->lapic_timer.period = min_period;
+		}
+	}
+}
+
 static void apic_update_lvtt(struct kvm_lapic *apic)
 {
 	u32 timer_mode = kvm_lapic_get_reg(apic, APIC_LVTT) &
@@ -1446,23 +1467,7 @@ static bool set_target_expiration(struct kvm_lapic *apic)
 	if (!apic->lapic_timer.period)
 		return false;
 
-	/*
-	 * Do not allow the guest to program periodic timers with small
-	 * interval, since the hrtimers are not throttled by the host
-	 * scheduler.
-	 */
-	if (apic_lvtt_period(apic)) {
-		s64 min_period = min_timer_period_us * 1000LL;
-
-		if (apic->lapic_timer.period < min_period) {
-			pr_info_ratelimited(
-			    "kvm: vcpu %i: requested %lld ns "
-			    "lapic timer period limited to %lld ns\n",
-			    apic->vcpu->vcpu_id,
-			    apic->lapic_timer.period, min_period);
-			apic->lapic_timer.period = min_period;
-		}
-	}
+	limit_periodic_timer_frequency(apic);
 
 	apic_debug("%s: bus cycle is %" PRId64 "ns, now 0x%016"
 		   PRIx64 ", "


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