[Devel] [PATCH RHEL7 COMMIT] ms/KVM: x86: handle 0 write to TSC_DEADLINE MSR
Konstantin Khorenko
khorenko at virtuozzo.com
Wed Jul 25 18:47:09 MSK 2018
The commit is pushed to "branch-rh7-3.10.0-862.9.1.vz7.63.x-ovz" and will appear at https://src.openvz.org/scm/ovz/vzkernel.git
after rh7-3.10.0-862.9.1.vz7.63.2
------>
commit 1c0144891eb662261fdabb55649c0250c5c0df95
Author: Radim KrÄmáŠ<rkrcmar at redhat.com>
Date: Wed Jul 25 18:47:09 2018 +0300
ms/KVM: x86: handle 0 write to TSC_DEADLINE MSR
0 should disable the timer, but start_hv_timer will recognize it as an
expired timer instead.
Signed-off-by: Radim KrÄmáŠ<rkrcmar at redhat.com>
Reviewed-by: Wanpeng Li <wanpeng.li at hotmail.com>
Signed-off-by: Paolo Bonzini <pbonzini at redhat.com>
(cherry picked from commit 86bbc1e6d7ce016f1b2e8c29864cd7b75b00ff96)
Signed-off-by: Viktor Prutyanov <viktor.prutyanov at virtuozzo.com>
https://jira.sw.ru/browse/PSBM-86578
Signed-off-by: Viktor Prutyanov <viktor.prutyanov at virtuozzo.com>
=====================
Patchset description:
Fix guest context switch performance degradation.
https://jira.sw.ru/browse/PSBM-86578
Following patches were adopted from mainline kernel to fix guest Windows
context switch performance degradation.
VMX preemption timer support was added in kernel-3.10.0-862.3.2.el7. In this
case, timer incorrectly triggers despite of its disabling and causes extra
VMexit on every context switch. These patches add correct handling of disabled
timer.
Radim KrÄmáŠ(3):
KVM: x86: handle 0 write to TSC_DEADLINE MSR
KVM: x86: really disarm lapic timer when clearing TMICT
KVM: x86: thoroughly disarm LAPIC timer around TSC deadline switch
Wanpeng Li (3):
KVM: LAPIC: Fix lapic timer mode transition
KVM: LAPIC: Introduce limit_periodic_timer_frequency
KVM: LAPIC: Keep timer running when switching between one-shot and
periodic mode
---
arch/x86/kvm/lapic.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index f16f16413992..4fb6d073a8ce 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1526,6 +1526,9 @@ static bool start_hv_timer(struct kvm_lapic *apic)
if (!apic_lvtt_period(apic) && atomic_read(&ktimer->pending))
return false;
+ if (!ktimer->tscdeadline)
+ return false;
+
r = kvm_x86_ops->set_hv_timer(apic->vcpu, ktimer->tscdeadline);
if (r < 0)
return false;
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