[CRIU] ARMv5 implementation counter value

[Cyrill Gorcunov]

On Thu, Apr 04, 2019 at 12:53:53PM +0000, Maikel Coenen wrote:
> On 04/04/2019, 14:44, "Cyrill Gorcunov" <gorcunov at gmail.com> wrote:
> 
>  >   On Thu, Apr 04, 2019 at 12:37:04PM +0000, Maikel Coenen wrote:
>  >   > Hi,
>  >  > 
>  >   > I am almost done with implementing ARMv5 implementation of CRIU but currently
>  >   > stuck at researching the input arguments of the function atomic_add_return and
>  >   > atomic_sub_return.
>  >   >
>  >   > These functions make use of the atomic_t struct with a counter in it but I want
>  >   > to know what possible values this counter can be, so I can make some kind
>  >   > of mutex for it.
>  >   > 
>  >   > Can someone help me with this question?
>  >   
>  >   Not sure I understand your question. Counters are integer values as far as I
>  >   remember, the only trick is to use lock prefix on instructions generated so
>  >   they won't be modified simultaneously on smp machines. Probably you should
>  >   look into linux kernel arch/ directory, usually atomic helpers are sitting
>  >   there.
> 
> True, but ARMv5 does not implement any lock prefix or exclusive load/store so you have
> to implement that yourself.

Ah, but there should be some kind of compare-exchange instructions.

>
> The counter integer, does it have any range of numbers it usually takes? Or for what
> purpose are these functions implemented?

They are general function, like counters with guarantee that once the counter incremented
the other cpus will observe updated value. The range is as for regular min/max integer values.
You could make a stub based on mutexes i think, for a while.