[Devel] [PATCH 4/7] x86/microcode/intel: hide warning on high order allocation for microcode area

[Alexander Mikhalitsyn]

From: Konstantin Khorenko <khorenko at virtuozzo.com>

Microcode blob can require a page of 3rd order and loading microcode
data is done using "wrmsr" asm instruction, so we cannot substitute
kmalloc() with kvmalloc() here.

Let's just hide the warning for this scenario, microcode update is a
rare operation anyway.

https://jira.sw.ru/browse/PSBM-86662

Signed-off-by: Konstantin Khorenko <khorenko at virtuozzo.com>
(cherry picked from commit 0b26c4a6f25cfd35a90a7d6dfa139cec30abb946)

VZ 8 rebase part https://jira.sw.ru/browse/PSBM-127837

Signed-off-by: Alexander Mikhalitsyn <alexander.mikhalitsyn at virtuozzo.com>
---
 arch/x86/kernel/cpu/microcode/intel.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index 6a99535d7f37..a47f1ea46139 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -155,7 +155,7 @@ static struct ucode_patch *memdup_patch(void *data, unsigned int size)
 	if (!p)
 		return NULL;
 
-	p->data = kmemdup(data, size, GFP_KERNEL);
+	p->data = kmemdup(data, size, GFP_KERNEL | __GFP_NOWARN);
 	if (!p->data) {
 		kfree(p);
 		return NULL;
-- 
2.28.0