[Devel] [PATCH RH8 0/3] KVM: x86/vPMU: ignore access to LBR-related MSRs (PSBM-75679)
Evgenii Shatokhin
eshatokhin at virtuozzo.com
Wed Apr 21 19:59:01 MSK 2021
This is the part of patchset from PSBM-75679 which is not present in
mainline or RHEL kernels.
I have adapted it to VZ8, added handling of new CPU models and simplified
the code a bit more.
Apart from that the patches have been renamed. The first two were named
"perf/x86/intel: make reusable LBR initialization code, part 1/2" and
"perf/x86/intel: make reusable LBR initialization code, part 2/2" in
VZ7. This confused the tools like 'git format-patch' which stripped the
last parts of the names, making them identical.
"ms/" prefix was also removed: the patches did not make it into the
mainline kernel.
They are probably not needed there: It looks like, the recent mainline kernels
(5.12-rcN+) added support for passthrough of LBR registers to the guest systems.
It should probably fix the issue described in PSBM-75679 but I haven't tried
that.
Details: https://lore.kernel.org/kvm/20210201051039.255478-1-like.xu@linux.intel.com
That mainline patchset has more prerequisites and some follow-up fixes.
It is likely, it has not been tested very thoroughly in production yet, esp.
with Windows guests. The kernels 4.18.0-240.* from RHEL8 do not have it yet,
by the way.
I'd stick with the VZ-specific patches for now, they are less invasive.
Signed-off-by: Evgenii Shatokhin <eshatokhin at virtuozzo.com>
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