[Devel] [PATCH RHEL7 COMMIT] KVM: nVMX: we support 1GB EPT pages
Konstantin Khorenko
khorenko at virtuozzo.com
Wed May 16 12:50:44 MSK 2018
The commit is pushed to "branch-rh7-3.10.0-693.21.1.vz7.50.x-ovz" and will appear at https://src.openvz.org/scm/ovz/vzkernel.git
after rh7-3.10.0-693.21.1.vz7.47.6
------>
commit 8e6a1ae3bc9e8d67b5a87ba4d564963df250e609
Author: Paolo Bonzini <pbonzini at redhat.com>
Date: Wed May 16 12:50:44 2018 +0300
KVM: nVMX: we support 1GB EPT pages
Large pages at the PDPE level can be emulated by the MMU, so the bit
can be set unconditionally in the EPT capabilities MSR. The same is
true of 2MB EPT pages, though all Intel processors with EPT in practice
support those.
Reviewed-by: David Hildenbrand <david at redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini at redhat.com>
(cherry picked from commit 7db742654dd59fde90af79d77372c5439399a9e6)
Signed-off-by: Jan Dakinevich <jan.dakinevich at virtuozzo.com>
=====================
Patchset description:
EPT fixes and enhancements
Backport of EPT fixes from upstream for
https://jira.sw.ru/browse/PSBM-84046
Bandan Das (3):
kvm: mmu: don't set the present bit unconditionally
kvm: mmu: track read permission explicitly for shadow EPT page tables
kvm: vmx: advertise support for ept execute only
Junaid Shahid (2):
kvm: x86: mmu: Use symbolic constants for EPT Violation Exit
Qualifications
kvm: x86: mmu: Rename EPT_VIOLATION_READ/WRITE/INSTR constants
KarimAllah Ahmed (2):
kvm: Map PFN-type memory regions as writable (if possible)
KVM: x86: Update the exit_qualification access bits while walking an
address
Paolo Bonzini (5):
KVM: nVMX: we support 1GB EPT pages
kvm: x86: MMU support for EPT accessed/dirty bits
kvm: nVMX: support EPT accessed/dirty bits
KVM: MMU: return page fault error code from permission_fault
KVM: nVMX: fix EPT permissions as reported in exit qualification
---
arch/x86/kvm/vmx.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 8a829ea510ba..9df8bcb2e44b 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -2654,14 +2654,14 @@ static void nested_vmx_setup_ctls_msrs(struct vcpu_vmx *vmx)
vmx->nested.nested_vmx_secondary_ctls_high |=
SECONDARY_EXEC_ENABLE_EPT;
vmx->nested.nested_vmx_ept_caps = VMX_EPT_PAGE_WALK_4_BIT |
- VMX_EPTP_WB_BIT | VMX_EPT_2MB_PAGE_BIT |
- VMX_EPT_INVEPT_BIT;
+ VMX_EPTP_WB_BIT | VMX_EPT_INVEPT_BIT;
if (cpu_has_vmx_ept_execute_only())
vmx->nested.nested_vmx_ept_caps |=
VMX_EPT_EXECUTE_ONLY_BIT;
vmx->nested.nested_vmx_ept_caps &= vmx_capability.ept;
vmx->nested.nested_vmx_ept_caps |= VMX_EPT_EXTENT_GLOBAL_BIT |
- VMX_EPT_EXTENT_CONTEXT_BIT;
+ VMX_EPT_EXTENT_CONTEXT_BIT | VMX_EPT_2MB_PAGE_BIT |
+ VMX_EPT_1GB_PAGE_BIT;
} else
vmx->nested.nested_vmx_ept_caps = 0;
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