[Devel] [PATCH rh7] x86/microcode/intel: hide warning on high order allocation for microcode area
Konstantin Khorenko
khorenko at virtuozzo.com
Fri Jul 20 13:59:17 MSK 2018
Microcode blob can require a page of 3rd order and loading microcode
data is done using "wrmsr" asm instruction, so we cannot substitute
kmalloc() with kvmalloc() here.
Let's just hide the warning for this scenario, microcode update is a
rare operation anyway.
https://jira.sw.ru/browse/PSBM-86662
Signed-off-by: Konstantin Khorenko <khorenko at virtuozzo.com>
---
arch/x86/kernel/cpu/microcode/intel.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index d256424d710d..0b3e769e35db 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -216,7 +216,7 @@ save_microcode(struct mc_saved_data *mcs,
mc_hdr = &mc->hdr;
size = get_totalsize(mc_hdr);
- saved_ptr[i] = kmemdup(mc, size, GFP_KERNEL);
+ saved_ptr[i] = kmemdup(mc, size, GFP_KERNEL | __GFP_NOWARN);
if (!saved_ptr[i]) {
ret = -ENOMEM;
goto err;
--
2.15.1
More information about the Devel
mailing list