[Devel] [PATCH RH7] perf/x86/intel: Print LBR support statement after validation

[Jan Dakinevich]

On Fri, 31 Aug 2018 14:35:06 +0300
Pavel Tikhomirov <ptikhomirov at virtuozzo.com> wrote:

> From: David Carrillo-Cisneros <davidcc at google.com>
> 
> We have a problem of many "16-deep LBR, " messages fludding dmesg in:
> 
> kvm_pmu_refresh
>   intel_pmu_refresh
>     intel_pmu_lbr_fill
>       __intel_pmu_lbr_fill
>         intel_pmu_lbr_init_*
> 
> By moving these message to __init intel_pmu_init we will see them only
> on kernel init in "Performance Events: ..." line.
> 
> Conflicts: Hunks in intel_pmu_lbr_init_knl, intel_pmu_lbr_init_hsw
> skipped and changed x86_pmu.lbr_nr to x86_pmu.lbr.nr because of:
> dbeee2df1c6a ("ms/perf/x86/intel: make reusable LBR initialization
> code")
> 
> https://jira.sw.ru/browse/HCI-131
> https://pmc.acronis.com/browse/VSTOR-14178
> 
> MS commit commit f09509b9398b ("perf/x86/intel: Print LBR support
> statement after validation")
> 
> The following commit:
> 
>   338b522ca43c ("perf/x86/intel: Protect LBR and extra_regs against
> KVM lying")
> 
> added an additional test to LBR support detection that is performed
> after printing the LBR support statement to dmesg.
> 
> Move the LBR support output after the very last test, to make sure we
> print the true status of LBR support.
> 
> Signed-off-by: David Carrillo-Cisneros <davidcc at google.com>
> Signed-off-by: Peter Zijlstra (Intel) <peterz at infradead.org>
> Reviewed-by: Stephane Eranian <eranian at google.com>
> Reviewed-by: Andi Kleen <ak at linux.intel.com>
> Cc: Alexander Shishkin <alexander.shishkin at linux.intel.com>
> Cc: Arnaldo Carvalho de Melo <acme at redhat.com>
> Cc: Jiri Olsa <jolsa at redhat.com>
> Cc: Kan Liang <kan.liang at intel.com>
> Cc: Linus Torvalds <torvalds at linux-foundation.org>
> Cc: Peter Zijlstra <peterz at infradead.org>
> Cc: Thomas Gleixner <tglx at linutronix.de>
> Cc: Vince Weaver <vincent.weaver at maine.edu>
> Link:
> http://lkml.kernel.org/r/1466533874-52003-2-git-send-email-davidcc@google.com
> Signed-off-by: Ingo Molnar <mingo at kernel.org>
> 
> Fixes: commit 493e43ea1a80 ("ms/KVM: x86/vPMU: ignore access to
> LBR-related MSRs") Signed-off-by: Pavel Tikhomirov
> <ptikhomirov at virtuozzo.com> ---
>  arch/x86/events/intel/core.c | 2 ++
>  arch/x86/events/intel/lbr.c  | 5 -----
>  2 files changed, 2 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/x86/events/intel/core.c
> b/arch/x86/events/intel/core.c index 92008f3f0021..740689dd8c48 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -4165,6 +4165,8 @@ __init int intel_pmu_init(void)
>  			x86_pmu.lbr.nr = 0;
>  	}
>  
> +	if (x86_pmu.lbr.nr)
> +		pr_cont("%d-deep LBR, ", x86_pmu.lbr.nr);
>  	/*
>  	 * Access extra MSR may cause #GP under certain
> circumstances.
>  	 * E.g. KVM doesn't support offcore event
> diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
> index b0946060dea0..aa5ed41f695f 100644
> --- a/arch/x86/events/intel/lbr.c
> +++ b/arch/x86/events/intel/lbr.c
> @@ -946,7 +946,6 @@ static void intel_pmu_lbr_init_core(struct
> x86_pmu_lbr *lbr)
>  	 * SW branch filter usage:
>  	 * - compensate for lack of HW filter
>  	 */
> -	pr_cont("4-deep LBR, ");
>  }
>  
>  /* nehalem/westmere */
> @@ -967,7 +966,6 @@ static void intel_pmu_lbr_init_nhm(struct
> x86_pmu_lbr *lbr)
>  	 *   That requires LBR_FAR but that means far
>  	 *   jmp need to be filtered out
>  	 */
> -	pr_cont("16-deep LBR, ");
>  }
>  
>  /* sandy bridge */
> @@ -987,7 +985,6 @@ static void intel_pmu_lbr_init_snb(struct
> x86_pmu_lbr *lbr)
>  	 *   That requires LBR_FAR but that means far
>  	 *   jmp need to be filtered out
>  	 */
> -	pr_cont("16-deep LBR, ");
>  }
>  
>  /* haswell */
> @@ -1019,7 +1016,6 @@ static void intel_pmu_lbr_init_skl(struct
> x86_pmu_lbr *lbr)
>  	 *   That requires LBR_FAR but that means far
>  	 *   jmp need to be filtered out
>  	 */
> -	pr_cont("32-deep LBR, ");
>  }
>  
>  /* atom */
> @@ -1034,7 +1030,6 @@ static void intel_pmu_lbr_init_atom(struct
> x86_pmu_lbr *lbr)
>  	 * SW branch filter usage:
>  	 * - compensate for lack of HW filter
>  	 */
> -	pr_cont("8-deep LBR, ");
>  }
>  
>  /* slm */

Looks good to me.

-- 
Best regards
Jan Dakinevich