[CRIU] [PATCH] arch/x86: fpu_state->fpu_state_ia32.xsave hast to be 64-byte aligned
Andrei Vagin
avagin at gmail.com
Sat Sep 14 10:26:22 MSK 2019
Before the 5.2 kernel, only fpu_state->fpu_state_64.xsave has to be
64-byte aligned. But staring with the 5.2 kernel, the same is required
for pu_state->fpu_state_ia32.xsave.
The behavior was changed in:
c2ff9e9a3d9d ("x86/fpu: Merge the two code paths in __fpu__restore_sig()")
Signed-off-by: Andrei Vagin <avagin at gmail.com>
---
compel/arch/x86/src/lib/include/uapi/asm/fpu.h | 8 ++++++--
criu/arch/x86/sigframe.c | 6 ++++++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/compel/arch/x86/src/lib/include/uapi/asm/fpu.h b/compel/arch/x86/src/lib/include/uapi/asm/fpu.h
index 509f4488b..4ff531fb9 100644
--- a/compel/arch/x86/src/lib/include/uapi/asm/fpu.h
+++ b/compel/arch/x86/src/lib/include/uapi/asm/fpu.h
@@ -263,7 +263,7 @@ struct xsave_struct_ia32 {
struct ymmh_struct ymmh;
uint8_t extended_state_area[EXTENDED_STATE_AREA_SIZE];
};
-} __aligned(FXSAVE_ALIGN_BYTES);
+};
typedef struct {
/*
@@ -309,7 +309,11 @@ typedef struct {
typedef struct {
union {
fpu_state_64_t fpu_state_64;
- fpu_state_ia32_t fpu_state_ia32;
+ struct {
+ /* fpu_state_ia32->xsave has to be 64-byte aligned. */
+ uint32_t __pad[2];
+ fpu_state_ia32_t fpu_state_ia32;
+ };
};
uint8_t has_fpu;
diff --git a/criu/arch/x86/sigframe.c b/criu/arch/x86/sigframe.c
index 11b0d640d..33ba14387 100644
--- a/criu/arch/x86/sigframe.c
+++ b/criu/arch/x86/sigframe.c
@@ -28,8 +28,14 @@ int sigreturn_prep_fpu_frame(struct rt_sigframe *sigframe,
sigframe->native.uc.uc_mcontext.fpstate = (uint64_t)addr;
} else if (!sigframe->is_native) {
+ unsigned long addr = (unsigned long)(void *)&fpu_state->fpu_state_ia32.xsave;
sigframe->compat.uc.uc_mcontext.fpstate =
(uint32_t)(unsigned long)(void *)&fpu_state->fpu_state_ia32;
+ if ((addr % 64ul)) {
+ pr_err("Unaligned address passed: %lx (native %d)\n",
+ addr, sigframe->is_native);
+ return -1;
+ }
}
return 0;
--
2.14.5
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