[CRIU] [PATCH 4/4] ppc asm/bitops.h: fix for clang

Kir Kolyshkin kir at openvz.org
Tue Oct 25 22:08:32 PDT 2016


clang-3.8 fails to compile inline asm having ldarx with 4 args.

Quoting [1]:
'''
Recent versions of the PowerPC architecture added a hint bit to the larx
instructions to differentiate between an atomic operation and a lock
operation:

> 0 Other programs might attempt to modify the word in storage addressed by EA
> even if the subsequent Store Conditional succeeds.
>
> 1 Other programs will not attempt to modify the word in storage addressed by
> EA until the program that has acquired the lock performs a subsequent
> store releasing the lock.
'''

I also found some more info about this in [2].

Anyway, we could either construct some preprocessor logic to omit this
argument for clang, or just drop it. This patch does the latter.

[1] https://patchwork.ozlabs.org/patch/45008/
[2] https://sourceware.org/ml/libc-alpha/2015-03/msg00085.html

Cc: Laurent Dufour <ldufour at linux.vnet.ibm.com>
Signed-off-by: Kir Kolyshkin <kir at openvz.org>
---
 criu/arch/ppc64/include/asm/bitops.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/criu/arch/ppc64/include/asm/bitops.h b/criu/arch/ppc64/include/asm/bitops.h
index 9109719..b139889 100644
--- a/criu/arch/ppc64/include/asm/bitops.h
+++ b/criu/arch/ppc64/include/asm/bitops.h
@@ -68,7 +68,7 @@ static __inline__ void fn(unsigned long mask,   \
         unsigned long old;                      \
         unsigned long *p = (unsigned long *)_p; \
         __asm__ __volatile__ (                  \
-"1:	ldarx	%0,0,%3,0\n"			\
+"1:	ldarx	%0,0,%3\n"			\
         stringify_in_c(op) "%0,%0,%2\n"		\
         "stdcx.	%0,0,%3\n"			\
         "bne- 1b\n"                             \
-- 
2.7.4



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