[CRIU] [PATCH 0/2] ppc64: Transactional Memory support

[Laurent Dufour]

This series is providing the Transaction Memory (TM) support for
PowerPC.

TM operations have been introduced in POWER ISA 3.0 for Power 8
processors. Snippet from POWER ISA says:

"Transactional memory is a shared-memory synchronization construct
allowing an application to perform a sequence of storage accesses that
appear to occur atomically with respect to other threads."

The first patch of this series is extracting part of code dealing with
the registers state to factorize this code with the TM support.

The second patch is providing the TM state checkpoint / restart
through the new provided ptrace API dealing with the TM registers
state (see https://lkml.org/lkml/2016/7/27/656). This new ptrace API
are available in kernel starting release 4.8.

Laurent Dufour (2):
  ppc64: Extract copy to protobuf functions
  ppc64: handle transactional memory state

 criu/arch/ppc64/crtools.c              | 547 ++++++++++++++++++++++++---------
 criu/arch/ppc64/include/asm/restorer.h |   8 +-
 criu/arch/ppc64/restorer.c             |  31 ++
 images/core-ppc64.proto                |  13 +
 4 files changed, 447 insertions(+), 152 deletions(-)

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2.7.4