[CRIU] [PATCH] ppc64: Fix buggy floating point register handling

[Laurent Dufour]

The checkpoint and restore of the Power PC floating point registers is
buggy.

The issue is that the signal frame context is defined to store double value
while the protocol buffer is handling unsigned 64bits integer value. A
silent cast done by the compiler was modifying the restored value in our
back.

This fix changes the type used when manipulating the FP registers value to
be consistent between checkpoint and restart.

Signed-off-by: Laurent Dufour <ldufour at linux.vnet.ibm.com>
---
 arch/ppc64/crtools.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/ppc64/crtools.c b/arch/ppc64/crtools.c
index c4e70b554c81..7dac4376a97e 100644
--- a/arch/ppc64/crtools.c
+++ b/arch/ppc64/crtools.c
@@ -118,7 +118,7 @@ int syscall_seized(struct parasite_ctl *ctl, int nr, unsigned long *ret,
  */
 static int get_fpu_regs(pid_t pid, CoreEntry *core)
 {
-	elf_fpregset_t fpregs;
+	uint64_t fpregs[NFPREG];
 	UserPpc64FpstateEntry *fpe;
 	int i;
 
@@ -140,7 +140,7 @@ static int get_fpu_regs(pid_t pid, CoreEntry *core)
 	}
 
 	/* FPSRC is the last (33th) register in the set */
-	for (i=0; i<NFPREG; i++)
+	for (i = 0; i < NFPREG; i++)
 		fpe->fpregs[i] = fpregs[i];
 
 	core->ti_ppc64->fpstate = fpe;
@@ -150,9 +150,10 @@ static int get_fpu_regs(pid_t pid, CoreEntry *core)
 static void put_fpu_regs(mcontext_t *mc, UserPpc64FpstateEntry *fpe)
 {
 	int i;
+	uint64_t *mcfp = (uint64_t *)mc->fp_regs;
 
-	for (i=0; i<fpe->n_fpregs; i++)
-		mc->fp_regs[i] = (double)(fpe->fpregs[i]);
+	for (i = 0; i < fpe->n_fpregs; i++)
+		mcfp[i] =  fpe->fpregs[i];
 }
 
 int get_task_regs(pid_t pid, user_regs_struct_t regs, CoreEntry *core)
-- 
1.9.1