[CRIU] [PATCH] arm: fix compilation on ARMv6

Ruslan Kuprieiev kupruser at gmail.com
Mon Dec 22 03:43:29 PST 2014



22.12.2014 13:39, Andrew Vagin пишет:
> On Mon, Dec 22, 2014 at 01:25:32PM +0200, Ruslan Kuprieiev wrote:
>>
>>
>> 22.12.2014 13:16, Andrew Vagin пишет:
>>> Cc: Ruslan Kuprieiev <kupruser at gmail.com>
>>> Signed-off-by: Andrew Vagin <avagin at openvz.org>
>>> ---
>>>   arch/arm/include/asm/atomic.h |   61 +++++++++++++++++++++++++----------------
>>>   1 file changed, 37 insertions(+), 24 deletions(-)
>>>
>>> diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
>>> index 04faf58..cd0df37 100644
>>> --- a/arch/arm/include/asm/atomic.h
>>> +++ b/arch/arm/include/asm/atomic.h
>>> @@ -14,10 +14,47 @@ typedef struct {
>>>
>>>   #define smp_mb() __asm__ __volatile__ ("dmb" : : : "memory")
>>>
>>> +static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
>>> +{
>>> +	int oldval;
>>> +	unsigned long res;
>>> +
>>> +	smp_mb();
>>> +	prefetchw(&ptr->counter);
>>> +
>>> +	do {
>>> +		__asm__ __volatile__("@ atomic_cmpxchg\n"
>>> +		"ldrex	%1, [%3]\n"
>>> +		"mov	%0, #0\n"
>>> +		"teq	%1, %4\n"
>>> +		"strexeq %0, %5, [%3]\n"
>>> +		    : "=&r" (res), "=&r" (oldval), "+Qo" (ptr->counter)
>>> +		    : "r" (&ptr->counter), "Ir" (old), "r" (new)
>>> +		    : "cc");
>>> +	} while (res);
>>> +
>>> +	smp_mb();
>>> +
>>> +	return oldval;
>>> +}
>>> +
>>>   #elif defined(CONFIG_ARMV6)
>>>
>>> +/* SMP isn't supported for ARMv6 */
>>> +
>>>   #define smp_mb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5"	: : "r" (0) : "memory")
>>>
>>> +static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
>>> +{
>>> +        int ret;
>>> +
>>> +        ret = v->counter;
>>> +        if (ret == old)
>>> +                v->counter = new;
>>> +
>>
>> I have a better one with raw_local_irq_*. =)
>
> Are you going to block signals? I don't think that it's required here.

Could you explain why, please? Just for my education.
Btw, sorry for a 2 day delay, I took this weekend
to setup my Raspberry PI and try to test on it =).

>
>> I will send it ASAP.
>>
>>> +        return ret;
>>> +}
>>> +
>>>   #else
>>>
>>>   #error ARM architecture version (CONFIG_ARMV*) not set or unsupported.
>>> @@ -91,28 +128,4 @@ static inline int atomic_dec(atomic_t *v) { return atomic_sub_return(1, v) + 1;
>>>
>>>   #define atomic_inc_return(v)	(atomic_add_return(1, v))
>>>
>>> -static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
>>> -{
>>> -	int oldval;
>>> -	unsigned long res;
>>> -
>>> -	smp_mb();
>>> -	prefetchw(&ptr->counter);
>>> -
>>> -	do {
>>> -		__asm__ __volatile__("@ atomic_cmpxchg\n"
>>> -		"ldrex	%1, [%3]\n"
>>> -		"mov	%0, #0\n"
>>> -		"teq	%1, %4\n"
>>> -		"strexeq %0, %5, [%3]\n"
>>> -		    : "=&r" (res), "=&r" (oldval), "+Qo" (ptr->counter)
>>> -		    : "r" (&ptr->counter), "Ir" (old), "r" (new)
>>> -		    : "cc");
>>> -	} while (res);
>>> -
>>> -	smp_mb();
>>> -
>>> -	return oldval;
>>> -}
>>> -
>>>   #endif /* __CR_ATOMIC_H__ */
>>>


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